Overcome reset domain crossing challenges when using UPF
A DVCon technical paper addresses potential reset domain crossing metastability issues due to UPF instrumentation.
Archives
Practical steps toward ECAD-MCAD integration for automotive design
The need for the electrical and mechanical design domains to inform one another in more detail is recognized, but how do you do it?
Keynotes for DVCon Europe announced
DVCon Europe has announced its first two keynote speakers, who will cover the topics of AI and the role of virtualisation in ADAS design and implementation
DAC and RISC-V move in together at Moscone in December
DAC and the RISC-V Summit will colocate at Moscone West in December, along with Semicon West.
Automate latchup verification for 3DIC
A Siemens white paper describes a way of automatically deriving information from 2.5D/3DIC designs to streamline latchup design-rules verification.
ST makes its first 200mm SiC wafers
STMicroelectronics has made its first silicon carbide wafers that can be run on a 200mm line.
Learn how to apply formal verification to safety-critical aviation designs
A detailed technical overview of formal verification within the context of the DO-254 (ED-80) standard is now available to download.
Cadence uses reinforcement learning to tune flow
Cadence has launched a tool that the company claims can speed up implementation by applying machine learning across the flow.
Arm shows off biggest flex processor so far
Arm and flexible-electronics specialist PragmatIC have demonstrated a 32bit processor implemented on a plastic substrate.
Chiplet design raises big questions
Building products using chiplets involves more than treating them as hard IP cores. Many open questions surround the field, explored by panelists in a MEPTEC conference online.