EDA

June 18, 2013

Real Intent highlights hierarchical clock domain crossing with Meridian 5.0

SystemVerilog and Synopsys Verdi integration are among further enhancements as clock domain crossing competition intensifies.
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June 14, 2013

Synopsys launches single kit to optimize IP across PPA

Latest addition to DesignWare portfolio balances trade-offs across CPUs, GPUs and DSPs while automating custom design techniques such as multi-bit flip flops.
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June 10, 2013

Altera outlines process roadmap for ‘Gen 10’ FPGAs

Altera has disclosed a number of the features that will make it into the top end of its upcoming 'Generation 10' family of FPGAs.
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June 7, 2013

FinFET shift could drive analog automation as layout effects bite

The arrival of the finFET brings with it simulation and physical restrictions that might lead teams to resort to layout automation to get the job done.
June 5, 2013

FinFET processes demand delicate tradeoffs for mobile SoCs – GlobalFoundries process architect

The increasing use of graphics in mobile SoCs means that finFET processes need to be optimised for density and power - as well as early availability at low risk.
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June 5, 2013

Jasper, Duolog bring formal verification to IP specification and assembly, low-power design

Deal creates methodologies and tools to help deliver IP and SoC assemblies verified using formal methods. Low-power verification strategy also launched.
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June 4, 2013

Timing signoff: maybe it’s time to get rid of the clock

The effort needed in timing signoff could lead to a shift in design towards asynchronous techniques unless advanced OCV technologies improve.
June 3, 2013

CMOS “good for another century,” says father of finFET

CMOS approaches are likely to underpin electronics for the next century, according to Chenming Hu, father of the finFET
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June 3, 2013

UPF group moves to consider system-power issues

The group that developed the IEEE 1801 Unified Power Format standard is looking to bringing power modeling and estimation to the system level for version 3.0, due in 2015.
June 3, 2013

Embedded world ‘needs EDA’s models’

The EDA industry has a way to capture the embedded software market, analyst Gary Smith said ahead of DAC. But it’s not through tools – it’s through models.
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