July 25, 2014
Foundry licenses atomistic TCAD simulator to better understand key aspects of advanced process nodes.
July 17, 2014
Cadence Design Systems has developed an FPGA-based prototyping system that takes advantage of much closer alignment with its existing Palladium XP emulator to accelerate bring-up and support debugging across both platforms.
July 15, 2014
Cadence has launched a parasitic-extraction tool that takes better advantage of multiple computers and which has been certified for TSMC's 16nm finFET process.
July 10, 2014
FinScale has developed a design and process recipe for a finFET structure that the company claims is easier to make but which provides better performance than existing approaches.
July 8, 2014
Coverage and hardware acceleration can bring greater focus to the SoC-level checks needed to ensure that the final silicon works as expected – both issues tackled in an archived Cadence webinar.
July 4, 2014
Chinese foundry Semiconductor Manufacturing International Corporation (SMIC) is to get a helping hand to develop a production-class 28nm process from Qualcomm Technologies.
July 3, 2014
As well as starting up a version for the European market, the Accellera Systems Initiative is taking DVCon to India in the early autumn.
July 2, 2014
STMicroelectronics is using the OpenPDK standard from Si2 to speed up the production and delivery of process design kits (PDKs) and asks for wider adoption by foundries.
June 25, 2014
Any conference can only be as good as the feedback it gets. And next year's DAC team is actively looking for yours. It'll be worth your time.
June 25, 2014
Accellera has released the latest version of the Universal Verification Methodology (UVM) class reference document, with additions to the way in which testbenches can handle messages and registers.