Siemens EDA

June 26, 2018

EDA learns to love AI

Machine learning is gradually moving into implementation and verification tools for EDA.
June 22, 2018

Mentor strikes deal to buy Austemper

Deal to buy functional safety specialist builds out the automotive and Industry 4.0 offerings for Mentor and its parent Siemens.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , ,   |  Organizations: ,
June 19, 2018

Mentor targets DRC efficiencies for place-and-route with Calibre RealTime Digital

Early users of the new P&R integrated physical verification tool say time-to-sign-off was cut by 40% and above.
Article  |  Topics: Verification  |  Tags: , , , , ,   |  Organizations:
May 24, 2018

Case study demonstrates 59% extra power savings for HPC

Taiwanese ASIC specialist Alchip discusses use of Mentor PowerPro for low power on 16nm 24x24 array HPC chip in detail
Article  |  Topics: Digital/analog implementation, Blog - EDA, - HPC, RTL  |  Tags: , ,   |  Organizations: ,
May 2, 2018

User2User Silicon Valley rolls out later this month

Mentor's west coast user conference will take place in Santa Clara on May 15. Attendance is free-of-charge.
April 26, 2018

Combining tools and services for evolving automotive design flows

Automotive companies need to partner closely with tool suppliers as design processes are disrupted by new technologies.
April 25, 2018

Anne Cirkel recognized for advancing role of women in electronics design

Mentor executive, former Design Automation Conference chair and Tech Design Forum journal founder to receive Marie R. Pistilli Award at DAC 2018.
Article  |  Topics: Conferences, Blog - EDA, - General, Industry Blogs  |  Tags:   |  Organizations:
April 10, 2018

Control test point counts for ISO 26262

The automotive safety standard targets 90% in-system test coverage. VersaPoint technology helps to simplify reaching your target.
Article  |  Topics: Product, Standards, Tested Component to System  |  Tags: , , , , , , ,   |  Organizations:
April 5, 2018

Mentor aims to grow emulation with lower gate-count hardware

Strato emulator family adds modular boxes that can build from 640K and 1.25B gate-counts for automotive, mil/aero markets and 'digital twin' strategies.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , , , , ,   |  Organizations:
March 23, 2018

Layout schema generation speeds early-stage yield learning

LSG generates random design-like test vehicles to enable more detailed pre-ramp analysis for incoming nodes.