Alchip


May 24, 2018

Case study demonstrates 59% extra power savings for HPC

Taiwanese ASIC specialist Alchip discusses use of Mentor PowerPro for low power on 16nm 24x24 array HPC chip in detail
Article  |  Topics: Digital/analog implementation, Blog - EDA, - HPC, RTL  |  Tags: , ,   |  Organizations: ,

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