Conference

Breker's work towards the portable stimulus roll-out will lead much of its offering later this month in San Jose.

The Siemens subsidiary is involved with a wide range of tutorials, technical papers and more at this month's San Jose conference.

UPF power state tables have become unwieldy due to rapid growth in LP design. The new construct, 'add_power_state' enables better verification flows.

Synopsys' line-up at next week's ARM TechCon includes joint presentations with Huawei and Nvidia.

Mentor will present seven papers during the ARMTech Con and a dedicated session, and exhibit at Booth #606.

Cliosoft sees a merging of social features and design-data repositories as driving more efficient reuse in chipmakers, bringing them together in its recently launched DesignHub product line.

An emulator that extends the reach of hardware acceleration into the world of multiphysics analysis could result from the merger of Siemens PLM Software with Mentor.

Former Cadence CEO tells DAC the IoT will lead to a burgeoning of chip design starts, followed by a brutal consolidation.

UltraSoc has donated to the RISC-V Foundation a specification for processor trace to try to provide the ecosystem with a common way of exporting runtime data to software tools.

Plunify will demonstrate its new Kabuto tool that recommends RTL fixes for FPGA designs at the Design Automation Conference.