Verific Design Automation, the tool development specialist, and its R&D and applications staff will be at the exhibition during the Design Automation Conference (DAC) in San Francisco next week (Booth #1415).
The company will highlight its SystemVerilog, Verilog, VHDL and UPF Parser Platforms, alongside its ‘Verific with INVIO’ platform.
The platform is a cost-effective environment using its SystemVerilog- and VHDL-language agnostic Python APIs to simplify and streamline a user’s design environment and accelerate tool development.
Attendees can pick up this year’s usual giraffe giveaway.
DAC 2022 takes place at the Moscone West conference center in San Francisco. It is collocated with SEMICON West. The DAC conference runs July 10-14 and the exhibition from July 11-13.