Cadence updates emulation and prototyping lineup

By Chris Edwards |  No Comments  |  Posted: April 6, 2021
Topics/Categories: Blog - EDA  |  Tags: ,  | Organizations:

Cadence Design Systems has updated its emulation and prototyping platforms, using a new custom processor for the Palladium Z2 emulator and the Xilinx UltraScale+ VU19P FPGAs for the Protium X2 prototyping engine.

The company says the pair of systems are supported by a single compiler and provide the same external interfaces. According to the company, the compiler can process 10 billion gates in under 10 hours for designs targeted at the Palladium Z2 system and in under 24 hours for the Protium X2 system.

Tran Nguyen, senior director of design services at Arm, said, “With the new Cadence Palladium Z2 system, we have seen up to 50 per cent improvement in performance and 2X improvement in capacity for our latest designs, providing us with the powerful pre-silicon capabilities needed to verify our next-generation IP and products.”

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