EDA

Mentor is active across the program and its main and Verification Academy booths within the exhibition in Las Vegas.

In Las Vegas, the parser specialist will demonstrate its tools for EDA software development across VHDL, SystemVerilog and UPF.

Cadence and OneSpin are applying various forms of machine learning to their tools to automate formal verification.

EDA and IP supporters of the new event see the goal of greater integration with the electronic systems supply chain as fundamental to their involvement.

A digital twin is now more than just a virtual copy of a product. For Siemens, it is a multilayered concept powering a 'boundary-free innovation platform'.

Mentor's technical conference will take place on May 2 at the Santa Clara Marriott and feature more than 45 user and vendor presentations.

Three hierarchical DFT strategies help cut time-to-market for large AI chips by exploiting regularity and addressing test at the RTL.

Breker CEO Adnan Hamid will lead a tutorial on the Portable Stimulus Standard as part of the verification specialist's activities in Shanghai.

The verification specialist will address the challenges posed by billion-gate SoCs and the integration of formal and simulation in its presentations.

Cadence has launched a web-based EDA service the company hopes will ease the transition from self-hosted computing to more flexible cloud-based development.