Accellera

July 3, 2014

DVCon India heads to Bangalore

As well as starting up a version for the European market, the Accellera Systems Initiative is taking DVCon to India in the early autumn.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations:
June 25, 2014

Accellera releases version 1.2 of UVM

Accellera has released the latest version of the Universal Verification Methodology (UVM) class reference document, with additions to the way in which testbenches can handle messages and registers.
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June 10, 2014

Verilog-AMS release adds to power-aware analog modeling

Accellera has published version 2.4 of the Verilog-AMS standard for mixed-signal modeling and verification as the group works on a merger of the language with SystemVerilog.
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May 21, 2014

Verification perspectives 2: formal for the masses and graph-based techniques

The second part of our interview with Mark Olen and Jim Kenney, looks at how formal and graph-based techniques move the market beyond simulation.
February 21, 2014

DVCon sets up in Europe

Verification conference DVCon is expanding into Europe with a two-day conference and show at the Hilton in Munich, Germany.
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October 2, 2013

IP-XACT gets design-flow extensions

Accellera has vendor extensions for IP-XACT that allow tool-specific metadata to be added to support activities such as power-aware verification and floorplanning.
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July 30, 2013

Three Accellera proposals aim for better TLM

Three companies have donated technology to Accellera designed to improve TLM 2.0 modeling work, focusing on interrupts, register control and memory maps.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , ,   |  Organizations: , , ,
June 3, 2013

UPF group moves to consider system-power issues

The group that developed the IEEE 1801 Unified Power Format standard is looking to bringing power modeling and estimation to the system level for version 3.0, due in 2015.
May 30, 2013

Latest version of IEEE 1801/UPF available for free

The latest revision of the IEEE 1801 Unified Power Format standard for verifying low-power designs has been made available through the IEEE Get Program.
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April 18, 2013

Accellera publishes tag standard for soft IP

Accellera Systems Initiative has published version of 1.0 of its Soft IP Tagging standard for adding licensing information to RTL and other design files.
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