Accellera

February 15, 2017

DVCon US 2017 preview: Mentor Graphics

The major verification conference is looming and Mentor's participation will include tutorials that explore the latest in portable stimulus, SystemC, VIP and more.
August 15, 2016

SystemC materials move to Apache 2.0 license

Accellera has moved to an Apache 2.0 open-source license for all of the supplementary materials for its SystemC library.
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February 22, 2016

DVCon United States 2016 preview: Real Intent

Verification specialist's DVCon activities are headlined by a panel on emulation and static verification.
February 22, 2016

DVCon United States 2016 preview: Mentor Graphics

Mentor Graphics chairman and CEO Wally Rhines will deliver the DVCon keynote as the vendor sets a deep agenda for the conference.
December 18, 2015

Accellera and Mentor’s Dennis Brophy talks standards targets and DVCon

Driving down energy consumption for the IoT, making portable stimulus deliver real benefits and the practical benefts of a globalizing DVCon.
November 12, 2015

DVCon Europe: Getting TLM to cope with proliferating ECUs and serial protocols

High powered alliance develops TLM standards to address growing automotive and IoT concerns.
October 8, 2015

Expanding role of UVM takes center stage at DVCon Europe

Tech Design Forum talked to the general and program chairs of DVCon Europe about the conference and how it seeks to show the expansion of IC verification methodologies to the system level.
September 25, 2015

DVCon Europe initial technical program unveiled

DVCon Europe has published the technical program for its upcoming November conference in Munich, Germany.
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September 2, 2015

Early registration opens for DVCon Europe 2015

Early registration has opened for the DVCon Europe conference to be held in Munich, Germany in November.
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February 11, 2015

Accellera sets up group for one-stop verification stimulus

Accellera has set up a working group to develop a language-independent way of capturing and managing test stimuli that can be used across a wide range of verification environments.
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