aging


December 27, 2023

Flow stability and chip reliability top the papers at DVCon Europe

The two best papers at the recent DVCon Europe underlined two of the issues that now face chip-implementation teams: efficient flows and reliability.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations:
May 14, 2020

The price of reliability is constant vigilance

Papers presented at the recent IRPS conference showed the growing importance of lifetime monitoring to the problem of handling components as they age.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: , ,
May 8, 2018

Cadence opens three fronts on mixed-signal failures

Cadence has started the rollout of a set of design tools for mixed-signal reliability analysis.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:

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