April 5, 2016
Cadence Design Systems has made additions to its Virtuoso mixed-signal design environment intended to improve design for manufacture and the ability of teams to create and test safety-critical systems.
October 6, 2015
Samsung bases PRISM and FLARE defect analysis and optimization on Mentor Graphics' Calibre and Tessent. Yields rise. Ramps shorten.
May 24, 2015
Cadence has launched the 16.6 release of its Allegro PCB-design portfolio, adding modules for manufacturing documentation and design-rule preparation aids.
April 21, 2015
Cadence Design Systems has added five products to its OrCAD line of PCB-design tools that cover manufacturability, signal integrity and management, and introduced three feature updates.
July 10, 2014
FinScale has developed a design and process recipe for a finFET structure that the company claims is easier to make but which provides better performance than existing approaches.
March 27, 2014
Valor NPI-based flow claims first in automating the passage of drawings to fabrication, and enabling dynamic DFM feedback from manufacturers.
November 6, 2013
Highway1 has opened up Spring applications for its incubation service for hardware startups: trying to overcome the gap between prototype and product.
May 22, 2013
A look at what you can learn about design for manufacturability and yield at this year's Design Automation Conference
October 26, 2012
The Mentor chief discusses ESL-based low power, emulation, 32nm to 20nm and using tools in the cloud.
October 11, 2012
Manufacturability, routing, library design and more - it all needs rethinking at 20nm