IP

May 28, 2021

PCIe 6.0 gets verification IP as formal arrival approaches

Questa suite of VIP adds PC and enterprise protocol as players prep designs for 2023 release.
May 26, 2021

Arm rolls clickthrough license scheme into Flexible Access

Arm is reworking the DesignStart scheme it introduced several years, moving it under the umbrella of the broader Flexible Access program.
Article  |  Tags: , , , ,   |  Organizations:
May 20, 2021

Denser DRAM looks to flash for inspiration

Unisantis aims to use its vertical transistor design in a novel form of DRAM that could improve density four-fold.
Article  |  Tags: , ,   |  Organizations:
April 20, 2021

Edge AI focuses on power efficiency at Linley Spring

The Linley Spring Conference saw several vendors present architectures that they claim can deliver more performance to edge systems than what are now traditional approaches.
Article  |  Tags: , ,
April 15, 2021

Portable stimulus moves to version 2.0

The Accellera board has approved version 2.0 of the Portable Test and Stimulus Standard.
Article  |  Tags: , ,   |  Organizations:
April 7, 2021

Accellera publishes security standard draft

Accellera has published the version 1.0 draft of the proposed Security Annotation for Electronic Design Integration standard.
Article  |  Tags: , ,   |  Organizations:
March 31, 2021

Arm looks to explore new realms for security with v9

Arm aims to introduce a novel security model in its upcoming v9 architecture along with further extensions for AI.
Article  |  Tags: , , , ,   |  Organizations:
December 17, 2020

Arm expands cloud migration on Arm-based machines at AWS

Arm is pushing more work onto Arm servers in the AWS cloud as it encourages EDA vendors to port their tools to the architecture.
Article  |  Tags: ,   |  Organizations: ,
December 17, 2020

Macronix proposes 3D to breathe life back into NOR flash

At IEDM this year, Macronix showed how a 3D architecture may bring back NOR flash, which stopped scaling a decade ago.
Article  |  Tags: , , ,   |  Organizations:
November 27, 2020

RISC-V in nearly a quarter of designs (Wilson Functional Verification 2020 – Part One)

Use of the open-source RISC-V processor was tracked for the first time by the biennial study, finding notably high take-up.

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors