Chipmaker

Achronix is introducing an FPGA architecture that pulls a full network-on-chip into the programmable-logic fabric combined with hardened matrix-math processors for AI.

Mentor is active across the program and its main and Verification Academy booths within the exhibition in Las Vegas.

Security and machine learning are two topics that take center stage at DAC this year, says the conference’s general chair Rob Aitken.

Large-scale MCMs and novel device architectures bookend the papers on machine learning at VLSI Symposia in an event that will also cover chiplet integration and other topics.

Mentor's technical conference will take place on May 2 at the Santa Clara Marriott and feature more than 45 user and vendor presentations.

Electronic musician Thomas Dolby will be among the keynote speakers at the 56th Design Automation Conference (DAC) in Las Vegas.

An Open Compute Project group working on multichip integration sees a combination of parallel and serial interfaces being important for interchip communication.

The ODSA Workgroup formed by Netronome and others is looking to adopt the PIPE standard for interconnecting chiplets as it starts work on a proof-of-concept module.

5G has given Beijing a development template to use across its Made in China 2025 program.

MACOM has decided to use GlobalFoundries' 90nm SOI process on 300mm wafers to build higher-integration optical-switching devices for servers.