Archives

Ceva's latest iteration of its XC architecture aims at the intensive DSP required for 5G basestations.

Xilinx plans to add high-speed analog interfaces to its upcoming FPGAs to better support high-density 5G basestation designs.

StratoM hardware has 2.5B-gate capacity and can scale to 15B gates. Throughput claimed at 5X faster than earlier Veloce generation.

The major verification conference is looming and Mentor's participation will include tutorials that explore the latest in portable stimulus, SystemC, VIP and more.

Intrinsic-ID has developed software that allows its PUF technology to be used in most systems that contain static memory together with a framework for managing secure keys in the supply chain.

Microsemi has launched a family of non-volatile FPGAs that use a 28nm process to increase density over the previous SmartFusion devices.

The Metasploit collection of tools used by penetration testers to find security flaws in software now has a bridge to deeply embedded hardware devices, developed by analytics company Rapid7.

A report put together by the European Union's Hipeac embedded architecture research network claims the challenges of highly interconnected embedded systems will call for what amounts to the reinvention of computing.

DesignCon 2017 takes place from Jan 31 to Feb 2 at the Santa Clara Convention Center with its usual focus on PCB design and implementation.

Online paper submissions are now open for the 2017 Symposia on VLSI Technology and Circuits.