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The Electronic System Design Alliance will discuss its recent decision to join SEMI and highlight DAC's new Infrastructure Alley.

Early users of the new P&R integrated physical verification tool say time-to-sign-off was cut by 40% and above.

Power analysis specialist will showcase the 2.0 edition of its PowerBaum analysis and modeling suite at DAC.

The parser specialist will demonstrate its recently announced INVIO integration to speed development around VHDL and SystemVerilog.

Imec will at this week’s VLSI Symposia describe how it fabricated a form of magnetic memory suitable for use as a non-volatile cache onto 300mm wafers using CMOS-compatible processes.

Accellera has published version 1.0 of the SystemC Configuration, Control and Inspection (CCI) standard.

Taiwanese ASIC specialist Alchip discusses use of Mentor PowerPro for low power on 16nm 24x24 array HPC chip in detail

Imec and Unisantis Electronics have developed a process flow based on a vertical transistor with a gate on all sides they claim will lead to denser memories on a 5nm node.

IEDM has issued a call for papers for its 2018 conference, expecting to cover devices and circuit interactions in neuromorphic, quantum and conventional computing.

Synopsys has extended its range of semiconductor IP for use in advanced driver assistance (ADAS) and autonomous vehicle SoCs with the launch of embedded vision processor blocks that have been given safety enhancements.