DAC 2018 preview: Baum

By TDF Staff |  No Comments  |  Posted: June 19, 2018
Topics/Categories: Digital/analog implementation, Blog - EDA, - RTL  |  Tags: , , ,  | Organizations:

Power solutions specialist Baum will showcase its next-generation PowerBaum2.0 modeling and analysis suite on Booth #2454 during the Design Automation Conference at Moscone West, San Francisco (Exhibition date: June 25-27).

PowerBaum 2.0 addresses three fundamental requirements of power analysis: power model generation, high-speed analysis and assurance of implementation accuracy. Baum sees these requirements as applicable across the entire development phase for the automotive, IoT, mobile, networking and server markets.

The tool generates power models by automatically learning and abstracting power behavior to achieve a higher level of accuracy within must faster run-times.

New capabilities in PowerBaum 2.0 include links to hardware emulation that enable the analysis and correction of power ‘bugs’ based on realistic software scenarios running within large systems.

Baum says PowerBaum can be used earlier in the design flow than rival tools, when there is more opportunity to optimize power and gain better energy efficiency for hardware/software co-design to optimize designs for low-power consumption, and power and thermal management.

The company’s solution supports dynamic and static power, taking in RTL and netlist descriptions of the design. A new feature supports power analysis at arbitrary temperatures specified by designers, thereby providing a methodology to understand temperature effects on their design’s power consumption. PowerBaum models plug into third-party RTL or SystemC simulators and automatically generate time-based power waveforms.

PowerWurzel, a companion product, will also be on view at DAC. It integrates with PowerBaum 2.0 by efficiently and accurately analyzing gate-level power, further increasing model accuracy.

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