ARM eases interconnect, debug, third-party IP integration for SoCs
Technology from Duolog acquisition used to ease the configuration of interconnect, debug and trace - and the integration of third-party IP
Duolog Technologies
Jasper, Duolog bring formal verification to IP specification and assembly, low-power design
Deal creates methodologies and tools to help deliver IP and SoC assemblies verified using formal methods. Low-power verification strategy also launched.