Software puts deep learning onto embedded DSP
Ceva has launched a software package intended to streamline the porting of convolutional neural network implementations to the XM4 DSP core.
Author Archives: Chris Edwards
Tensilica vision processor cuts power through memory changes
Memory efficiency has driven the design of the latest video and image processor core developed by Cadence Tensilica.
Vertical structures to debut at IEDM 2015
A novel approach to 3D NAND will be among the presentations at the International Electron Device Meeting to be held in Washington, DC in December.
DVCon Europe initial technical program unveiled
DVCon Europe has published the technical program for its upcoming November conference in Munich, Germany.
Menta aims for TSMC 28nm with embedded FPGA cores
Menta has launched a family of off-the-shelf IP cores aimed at TSMC’s 28nm processes to provide reconfigurability for SoCs.
Debug monitors look for deadlock
UltraSoC has added deadlock detection capabilities to its multicore onchip debug framework.
Early registration opens for DVCon Europe 2015
Early registration has opened for the DVCon Europe conference to be held in Munich, Germany in November.
Samsung applies early prediction and color management to 10nm plans
Rapid virtual prototyping and a metal stack that's more designer friendly are two of the ways in which Samsung aims to build up foundry market share for its 14nm and 10nm finFET processes.
PSpice builds interfaces to PCB and system-level cosimulation
The need for virtual prototyping at the PCB-design has led to changes in the way PSpice is being used – with much greater emphasis on cosimulation.
GlobalFoundries tunes 28nm for smaller, lower-power FD-SOI
GlobalFoundries has developed variants of the 28nm FD-SOI process that offer smaller die sizes and lower-power operation.