June 7, 2014
At DAC 2014, Intel’s chief security architect Ernie Brickell described the processor maker’s approach to protecting hardware and software from hacks and attacks.
June 6, 2014
Online portals enable ASIC designers to explore IP and delivery options, enabling lower-cost markets such as IoT
June 5, 2014
Head of TSMC R&D talks about what it will take to develop and use 10nm, 7nm processes, and a possible shift to using packaging to extend Moore's law scaling
June 5, 2014
New markets such as hardware cyber security, automotive and embedded software key to EDA industry growth
June 5, 2014
Qualcomm is looking to monolithic 3D and smart circuit architectures to make up for the loss of traditional 2D process scaling as wafer costs for advanced nodes continue to increase.
June 3, 2014
Synopsys adds formal, static, clock-domain crossing, and low-power checking to verification engineers' toolbar
June 3, 2014
Qualcomm will present at VLSI Technology Symposium 2014 a version of TSMC's 20nm technology that uses design and process tweaks to reduce the number of double-patterned layers.
June 2, 2014
The stall in Moore's Law caused by the rapid rise in cost of the advanced processes will shift more innovation to mature nodes Monday keynoters at DAC said.
June 2, 2014
Verify early and simulate as little as possible - the idea is familiar but how do you get there?
June 2, 2014
Samsung, Synopsys and ARM have been working together to create a finFET design ecosystem.