EDA

High-level synthesis is playing another important role in the matching of AI algorithms to necessarily application-specific designs.

The PCB and wire harness design specialist has posted an online blog with tips and advice on using and licensing its tools for home use.

The verification specialist is adding more online resources to help engineers working from home during the Covid-19 pandemic.

Updates to existing designs are often error-prone, though safety tolerances are necessarily tightening. This four-step strategy can help.

Traditional approaches to via insertion to meet reliability and yield at advanced nodes are giving way to necessary automation.

Intel describes active countermeasures for physical attacks at CICC as part of a trend towards more adaptive IoT silicon.

A flexible and still evolving range of 5G standards requires methodologies that can handle massive test.

DVCon US 2020 is to end a day early as a result of the COVID-19 coronavirus outbreak and released an updated agenda.

A new technical article discusses Renesas' addition of SLEC to its SystemC and RTL flows and the improvements it achieved in time and coverage..

Portable stimulus pioneer Breker will feature across the DVCon program also highlighting its work with RISC-V.