EDA

November 12, 2013

Cadence ties IR drop into static timing analysis

Cadence Design Systems uses parallelism in its Voltus tool to provide faster IR drop analysis and bridge static timing and IC-level power-integrity analysis.
November 5, 2013

Synopsys aims at fast real-time apps with ARC HS family

Synopsys has launched the ARC HS family of configurable-processor cores, using superpipelining to target high-performance embedded applications.
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November 5, 2013

Formal app looks for sneak paths in secure chips

Jasper Design Automation has developed a tool that analyzes RTL and gate-level HDL for hidden paths that may expose on-chip secure elements to hackers.
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October 30, 2013

The prospects for GALS: Real Intent’s view

Real Intent CTO Pranav Ashar talks about GALS: the reasons for and against using asynchronous protocols for chip-crossing communications and what to do about verification.
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October 29, 2013

HP: bring us your hardware, your workloads, your mass of data

HP is throwing open its doors to other companies to bring in the necessary hardware and low-level software to build a new generation of servers, each specialized to a workload.
October 29, 2013

ARM launches communities and asks for IoT ideas

ARM has launched at TechCon its own crop of online forums intended to let engineers collaborate and share ideas and has asked for IoT ideas.
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October 22, 2013

Memory gets smarter for network speedups

Memoir Systems has developed a set of memory controller IP cores that exploit common access patterns used by processors in network switches to improve performance and power consumption
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October 16, 2013

CDNLive calls out for papers

Cadence Design Systems has issued a call for papers for the European leg of its CDNLive of events for 2014. The deadline for the Silicon Valley event is also looming: the call closes mid-November 2013.
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October 11, 2013

Verification Futures rolls out in Europe next month

The one-day conference series features the latest innovations from many verification vendors in separate UK, France and Germany editions.
October 10, 2013

Cadence launches IP cores for 60GHz wireless and consumer audio

Cadence Design Systems has launched IP cores for high-end mobile audio as well as gigasample ADCs for 28nm to support 60GHz wireless.
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