systemc

September 22, 2017

5G and automotive provide applications focus for DVCon Europe

The massive complexity of 5G and automotive systems and the need for advanced verification techniques set the scene for DVCon Europe this year.
May 2, 2017

Wally Rhines looks beyond ‘endless verification’ to the system era

DVCon China saw Mentor's chairman and CEO give a typically thorough keynote on the evolving challenges for verification.
February 15, 2017

DVCon US 2017 preview: Mentor Graphics

The major verification conference is looming and Mentor's participation will include tutorials that explore the latest in portable stimulus, SystemC, VIP and more.
September 13, 2016

DVCon Europe to examine role of UVM, SystemC in system-level verification

DVCon Europe this year provides a venue for extending UVM, SystemC and TLM for faster, more effective verification its organizing committee claims.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , ,   |  Organizations:
August 15, 2016

SystemC materials move to Apache 2.0 license

Accellera has moved to an Apache 2.0 open-source license for all of the supplementary materials for its SystemC library.
Article  |  Topics: Blog - EDA, IP  |  Tags: ,   |  Organizations:
November 12, 2015

DVCon Europe: Getting TLM to cope with proliferating ECUs and serial protocols

High powered alliance develops TLM standards to address growing automotive and IoT concerns.
September 25, 2015

DVCon Europe initial technical program unveiled

DVCon Europe has published the technical program for its upcoming November conference in Munich, Germany.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations:
April 22, 2015

Thursday returns as DAC training day

The Design Automation Conference in San Francisco this year will again feature a day of half-day training courses provided by Doulos on Thursday, June 11 .
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
July 30, 2013

Three Accellera proposals aim for better TLM

Three companies have donated technology to Accellera designed to improve TLM 2.0 modeling work, focusing on interrupts, register control and memory maps.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , ,   |  Organizations: , , ,
May 14, 2013

Forte Cynthesizer aims at performance, power and ease of use

The fifth generation of Forte Design System's Cynthesizer tool is a slice of system-level evangelism.
Article  |  Topics: Blog - EDA, - ESL/SystemC  |  Tags: , , ,   |  Organizations:

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