5G and automotive provide applications focus for DVCon Europe
The massive complexity of 5G and automotive systems and the need for advanced verification techniques set the scene for DVCon Europe this year.
systemc
Wally Rhines looks beyond ‘endless verification’ to the system era
DVCon China saw Mentor's chairman and CEO give a typically thorough keynote on the evolving challenges for verification.
DVCon US 2017 preview: Mentor Graphics
The major verification conference is looming and Mentor's participation will include tutorials that explore the latest in portable stimulus, SystemC, VIP and more.
DVCon Europe to examine role of UVM, SystemC in system-level verification
DVCon Europe this year provides a venue for extending UVM, SystemC and TLM for faster, more effective verification its organizing committee claims.
SystemC materials move to Apache 2.0 license
Accellera has moved to an Apache 2.0 open-source license for all of the supplementary materials for its SystemC library.
DVCon Europe: Getting TLM to cope with proliferating ECUs and serial protocols
High powered alliance develops TLM standards to address growing automotive and IoT concerns.
DVCon Europe initial technical program unveiled
DVCon Europe has published the technical program for its upcoming November conference in Munich, Germany.
Thursday returns as DAC training day
The Design Automation Conference in San Francisco this year will again feature a day of half-day training courses provided by Doulos on Thursday, June 11 .
Three Accellera proposals aim for better TLM
Three companies have donated technology to Accellera designed to improve TLM 2.0 modeling work, focusing on interrupts, register control and memory maps.
Forte Cynthesizer aims at performance, power and ease of use
The fifth generation of Forte Design System's Cynthesizer tool is a slice of system-level evangelism.
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