Three Accellera proposals aim for better TLM
Three companies have donated technology to Accellera designed to improve TLM 2.0 modeling work, focusing on interrupts, register control and memory maps.
systemc
Forte Cynthesizer aims at performance, power and ease of use
The fifth generation of Forte Design System's Cynthesizer tool is a slice of system-level evangelism.
DAC 2013 Preview IV: Management and Training Days
DAC 2013 will offer a series of dedicated training courses in SystemVerilog, SystemC, and ARM-based design as well as its regular management day bridging the gap between technology and business.
Accellera publishes SystemC-AMS 2.0 standard
Accellera Systems Initiative has published the language reference manual for the latest version of its mixed-signal simulation environment based on SystemC. Version 2.0 of SystemC-AMS adds support for more dynamic behaviors in the analog domain.
DATE notebook: Help for heat-sensitive chips
Until the software is ready, it's often hard to tell when two neighbouring units on an SoC could combine to push the package past its maximum thermal point. Docea Power aims to help.
New SystemC reference simulator open for public comment
A reference simulator for the latest version of SystemC is now available for public review and comment, writes Accellera's Dennis Brophy.
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