Blog Topics

February 1, 2018

Metrics introduces elastic compute to handle peak-time verification

Metrics Technologies has launched as a supplier of cloud-based verification tools offering per-minute pricing.
January 31, 2018

Analog blocks go digital for faster integration

Movellus has launched the first of a series of IP-creation tools with one that will build all-digital PLLs and integrate them into a design.
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January 28, 2018

UltraSoC delivers trace for RISC-V

UltraSoC has released its first implementation of processor trace for cores based on the RISC-V instruction set.
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January 23, 2018

ARM DesignStart case study demonstrates scheme’s ease-of-use

ARM and Mentor describe a proof-of-concept project using free tools and IP to combine AMS and digital.
January 23, 2018

Triage without tears: improving debug’s most human challenge

Struggling with how to make your debug triage process more efficient? A new checklist could help focus your efforts.
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January 23, 2018

Capacity shortages loom if 2017 growth repeats

If current market trends persist, shortages in wafers are likely to follow, hurting the ability of some companies to ship silicon and boost the prices for those who can.
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January 23, 2018

Codasip updates processor-architecture tools

Codasip has launched the seventh generation of its Studio software for processor design and tuning, aiming to take advantage of the interest in RISC-V as a core instruction set for customized processors.
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January 18, 2018

Demand for better video, audio prompts HDMI 2.1 IP push

IP provides key building blocks for building better video and audio playback devices using HDMI 2.1
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January 5, 2018

Synopsys integrates Helic’s EM tools to tighten margins on mixed-signal, analogue and RF SoCs

Better integration of EM modeling and analysis tools with Synopsys' Custom Compiler should enable tighter design margins
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January 5, 2018

Ceva dedicates hardware to deep learning

Ceva has developed its first processor architecture aimed squarely at deep learning.
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