Blog Topics

January 5, 2018

Synopsys integrates Helic’s EM tools to tighten margins on mixed-signal, analogue and RF SoCs

Better integration of EM modeling and analysis tools with Synopsys' Custom Compiler should enable tighter design margins
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January 5, 2018

Ceva dedicates hardware to deep learning

Ceva has developed its first processor architecture aimed squarely at deep learning.
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January 2, 2018

The best in PCB design during 2017

Read some edited highlights from the most successful companies in Mentor's 2017 Technology Leadership Awards.
January 2, 2018

Watch out for layout effects on finFET reliability

As geometries have shrunk, layout-dependent effects in CMOS have become ever more problematic. They are not just popping up in performance but reliability and aging effects as one IEDM presentation showed.
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December 18, 2017

Third time lucky for iKettle security

IoT kettle maker changed its approach to bolster security, the company's CTO explained at the IoTSF conference in London.
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December 18, 2017

PCB tool rewrite to expand platform choices

Altium has rewritten its PCB-design software to improve graphics performance and provide the opportunity to port to non-Windows operating systems such as OS X.
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December 13, 2017

IC Manage expands big-data work

IC Manage is expanding its work on big data in EDA with the creation of a labs program that aims to work with clients on novel ideas for analyzing the gigabytes of output from chip-design tools.
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December 8, 2017

IP choice drives SSD controller design

Two-year-old design house make IP choice to use Synopsys DesignWare to build an enterprise SSD controller from scratch.
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December 7, 2017

Discover how ST adapted HLS for automotive imaging

ST has tweaked its standard HLS flow for ISPs to meet the requirements of ISO 26262
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December 6, 2017

European teams explore 3D integration tradeoffs

Two leading European research institutes presented their work on the feasibility and cost-effectiveness of monolithic 3D integration at this year's IEDM.
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