Siemens EDA

March 11, 2021

Hypervisors and frameworks in the multicore environment

At the recent Embedded World show and conference, Colin Walls of Siemens tackled the choices facing software developers working with multicore SoCs.
Article  |  Topics: Blog - Embedded  |  Tags: , , ,   |  Organizations:
February 26, 2021

Embeddedworld 2021 Digital preview: Siemens Embedded

Following its rebranding from Mentor, the division will have a strong presence in the main program and across virtual roundtables at next week's online event.
Article  |  Topics: Conferences, Blog - Embedded  |  Tags:   |  Organizations: ,
February 15, 2021

Getting a RISC-V embedded toolchain in place

A new white paper reviews the history of the open-source platform and provides guidance on best practice development for embedded.
Article  |  Topics: Blog - Embedded, - Next Generation Design, Standards  |  Tags: , ,   |  Organizations: ,
January 27, 2021

How to simplify ESD verification with pre-coded checks

Electrostatic discharge verification is becoming increasingly hard to achieve but automated pre-loaded checks can now help.
Article  |  Topics: Verification  |  Tags: , , , , , ,   |  Organizations:
January 22, 2021

How to use virtual mode in emulation

Virtual strategies make for greater productivity and widen the number of emulation use cases. A new paper considers some of the most popular examples.
January 14, 2021

A new methodology addresses the increasing challenge of reset domain crossing

Originally presented at DVCon Europe, a new paper automates complex steps in RDC verification and reduces noise.
Article  |  Topics: Case Study, Verification  |  Tags: ,   |  Organizations: ,
December 18, 2020

Virtual emulation delivers verification for the latest storage devices

Computational storage devices are posing a new raft of challenges that is being addressed using a powerful pre-silicon methodology.
December 14, 2020

Mentor rebrands as Siemens EDA

Mentor, a Siemens business, has rebranded as Siemens EDA, almost almost four years after the EDA company was acquired.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , ,   |  Organizations:
December 4, 2020

Analog surges as cause of IC respins (Wilson Functional Verification 2020 – Part Three)

Study may point to new challenges in more bidirectional AMS implementations on SoC-class designs, though formal and emulation help keep respin count in check.
December 1, 2020

Less than one-in-five FPGA projects avoid bug escapes (Wilson Functional Verification 2020 – Part Two)

Benchmark study detects correlation between maturity of verification processes and the quality of designs when they reach production.

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors