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Nvidia says it will support the UCIe chiplet interface standard once it has "stabilized" while opening up its latest form of NVLink to other companies.

A new white paper offers useful tips and techniques for PDN analysis and performance optimization in designs such as those using DDR4.

A panel at DVCon argued too much of a focus on point tools coupled with challenges with interoperability and cross-industry cooperation is hindering the ability of SoC teams to design and verify complex products.

Synopsys R&D vice president Manish Pandey described the ways in which the tools supplier has harnessed machine learning so far to gain speedups and improvements in coverage.

Nvidia has decided to give up on acquiring Arm from SoftBank. The IP provider will now aim for an IPO by the end of March 2023.

System Technology Co-optimization raises various SI, PI, thermal, mechanical and warp risks due to its use of advanced packaging. Early-stage prototyping mitigates them.

Silicon Photonics 3D integration posed LVS challenges in this fast emerging technical space. A case study describes how the two institutions overcame them.

Advanced packaging requirements from foundries and OSATs pose stringent challenges. A new paper describes three ways of satisfying them.

Siemens software will be used to accelerated the development of commercial aircraft.

At December's Design Automation Conference, AMD senior vice president Sam Naffziger provided more insights into the chipmaker’s use of chiplet-based design and manufacture.