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FinFETs, ever proliferating verification, 3DIC, security and more feature on our guide to some of the most intriguing panels at DAC 2013.

Accellera Systems Initiative has created a working group to look at one of the knottiest problems in IC design: to simplify the job of checking designs when the bits come from so many sources and use languages that were not built for interoperability.

In the first of our weekly DAC 2013 previews, we discuss program highlights with general chair Yervant Zorian, including an expanded Designer Track, keynotes and golden jubilee celebrations.

With an April release date promised, we should soon have confirmation on the new processor and price tag for the stripped down embedded Linux development board.

With both now more dependent on foundry business for their finFET (trigate) and FDSOI offerings, DATE was a chance to push their innovations in low power.

Four of the European centers for electronics research and business development have set up a project to try to create a virtual “silicon cluster” that aims ultimately to build a worldwide development network for energy-efficient systems.

EDA companies are having to plan for the different ways in which double patterning and finFETs could move into fabs, Antun Domic of Synopsys explains.

Don't underestimate the influence of metallic nanotubes and tube alignment, say Stanford researchers.

An early shift to finFET processes is making developing IP libraries more challenging.

Leading vendors and users spoke of the challenges in developing today's SoCs when faced with a plethora of prototyping techniques - and the challenges that remain.