Archives

DAC 2013 wants to bridge the gap between hardware and embedded software technical conferences, and has dedicated 35% of this year's technical program to that goal.

AMD has stepped back into the market for embedded processors with a quad core design derived from its desktop APUs, which combine a general-purpose x86 subsystem with a GPU.

Accellera Systems Initiative has published version of 1.0 of its Soft IP Tagging standard for adding licensing information to RTL and other design files.

ARM has decided to put together a package deal for some of the components that will let prospective customers implement a multiprocessor subsystem in a single SoC design

Dr Chenming Hu joins Mentor CEO Wally Rhines and Xilinx SVP Victor Peng to keynote free day-long User2User in San Jose on April 25th, capping a full technical program.

Scale-out computing has demands so different from conventional applications that it could reshape the way to design one class of multicore processors.

US defense research agency DARPA sets targets for cooling overall systems and hot spots in stacked silicon, and backs joint research from Rockwell-Collins and Georgia Tech.

Two vendors have announced early adopter software implementations of the new video compression standard that promises an up to 50% bandwidth cut against H.264.

The device modeling specialist has integrated its new NanoSpice simulator with existing capture and analysis tools in a broad design-for-yield package.

At DATE 2013, Synopsys senior vice president Antun Domic, described how techniques for the latest nodes are being rolled back into mature nodes, all the way to 180nm.