Arm rolls clickthrough license scheme into Flexible Access
Arm is reworking the DesignStart scheme it introduced several years, moving it under the umbrella of the broader Flexible Access program.
Archives
Cadence pushes its FastSpice to 32 cores
Cadence has launched a reworked FastSpice engine designed to split work across multiple cores more efficiently.
Denser DRAM looks to flash for inspiration
Unisantis aims to use its vertical transistor design in a novel form of DRAM that could improve density four-fold.
Understand how DO-254 defines verification for avionics
The avionics design assurance guidance has its own flavor of verification which needs to be understood alongside its definition of validation.
Sigasi editor provided free for open-source hardware developers
Sigasi aims to attract developers working on open-source projects with a version of its Studio suite the company is making available for free to that community.
Siemens extends Solido’s reach into IP validation with Fractal
Latest acquisition adds technologies to mitigate rising verification time and cost for third-party IP.
Alternative scaling approaches form VLSI 2021 technology highlights
The upcoming VLSI Symposia will feature a number of papers that show the ways in which novel approaches are going to be needed to continue scaling.
Siemens buys formal start-up OneSpin
The formal apps start-up has built strong positions in automotive and RISC-V and will strengthen Siemens in competition with Cadence.
Portable stimulus moves to version 2.0
The Accellera board has approved version 2.0 of the Portable Test and Stimulus Standard.
Navigating the Siemens EDA portfolio
The vendor has reworked its website and discussed more about its strategy going forward, following its rebranding from Mentor.