Archives

Aldec updates tools to add support for the latest release of the VHDL verification methodology.

Accellera Systems Initiative has published for open review version 2.0 of the Portable Test and Stimulus standard.

This year's IEDM will feature papers that exploit stacked nanoribbons to reduce CMOS footprint, graphene interconnects that support easier integration, and the variability prospects of 2D semiconductors.

A partnership between Siemens and VSI, a real-world autonomous vehicle research company, aims to refine and promote digital twin strategies.

The Arm Cortex-A78C extends the reach of the core into larger tablets and brings in one of a series of memory-protections extensions that will be used in the company's standard cores.

The free-to-attend user meetings for Mentor clients will retain the same format mixing technical presentations with keynotes and networking.

Functional verification for increasingly complex ARM-based designs is at the heart of the new consultancy partnership.

Among the papers that will be presented at the end of October, this year's DVCon Europe will demonstrate the benefits of taking good ideas from wherever you can in the pursuit of more effective verification flows.

At its DevSummit, Arm talked about the progress being made in Project Cassini, an initiative to bring cloud-style deployment and management tools to connected embedded systems.

As part of its move online during the pandemic, DVCon Europe is introducing what the organizers call Virtual Experience Rooms.