June 8, 2015
Following the acquisition of Jasper Design Automation last year, Cadence Design Systems is widening the target base of applications for formal verification, covering tasks from bug hunting through accelerated simulation to 'superlinting'.
June 8, 2015
Atrenta's SpyGlass line and others to be absorbed in Verification Continuum and Galaxy as part of EDA's latest major consolidation.
June 7, 2015
OneSpin Solutions has used its formal-verification technology as the basis for an app intended for ISO 26262 projects that analyzes the ability of a design to deal with fault conditions.
May 31, 2015
Senior verification expert at Imagination Technologies debunks ten myths surrounding the use of formal techniques in SoC design and verification
May 21, 2015
Formal-verification specialist OneSpin is setting up its own equivalent of an app store, building on top of a formal engine the company now licenses to other companies.
May 21, 2015
Agnisys is adding automated verification of SoC register maps to its IDesignSpec tool for defining and specifying registers and their behaviours, deploying both a dynamic and a formal version.
May 21, 2015
Meridian Physical CDC targets post-synthesis gate-level clock domain crossing issues, including unintended glitches and functional failures.
May 11, 2015
Conference addresses formal verification techniques at levels to suit beginners through to experts
September 29, 2014
Synopsys is integrating its verification tools to make it easier to move between verification approaches for software centric SoCs
June 2, 2014
Verify early and simulate as little as possible - the idea is familiar but how do you get there?
