EDA

July 8, 2014

Focusing coverage for system-level integration

Coverage and hardware acceleration can bring greater focus to the SoC-level checks needed to ensure that the final silicon works as expected – both issues tackled in an archived Cadence webinar.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:
June 25, 2014

Sensor-hub infrastructure moves to open source

With the aim of accelerating the development of applications and algorithms that harness sensor fusion, startup Sensor Platforms has released as open source its Open Sensor Platform (OSP).
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , , , ,   |  Organizations: ,
June 12, 2014

Internet of Things: an opportunity, but for whom?

Building the internet of Things will demand collaboration and a healthy ecosystem
Article  |  Topics: Commentary, Conferences, Blog - Embedded  |  Tags: , ,   |  Organizations: , ,
June 9, 2014

Applications won’t find all the bugs, but they have their uses

Can applications provide useful input for verification? They can but not when run straight out of the box, panelists at DAC 2014 said.
June 5, 2014

EDA industry must look to new markets for growth – Rhines

New markets such as hardware cyber security, automotive and embedded software key to EDA industry growth
Article  |  Topics: Conferences, General  |  Tags: , ,   |  Organizations:
June 3, 2014

Synopsys adds formal, CDC, low-power checks to Verification Compiler

Synopsys adds formal, static, clock-domain crossing, and low-power checking to verification engineers' toolbar
Article  |  Topics: Product, Verification  |  Tags: , ,   |  Organizations:
June 2, 2014

Chipmaking’s future: all of the nodes all of the time

The stall in Moore's Law caused by the rapid rise in cost of the advanced processes will shift more innovation to mature nodes Monday keynoters at DAC said.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: ,
June 2, 2014

Real Intent’s Pranav Ashar on converging design and verification

Verify early and simulate as little as possible - the idea is familiar but how do you get there?
June 2, 2014

Samsung certifies Synopsys tools, IP at 14nm

Samsung, Synopsys and ARM have been working together to create a finFET design ecosystem.
Article  |  Topics: Conferences, Design to Silicon, Blog - IP  |  Tags: ,   |  Organizations: , ,
June 2, 2014

Mentor’s Wally Rhines on tools as a cultural issue

Whether you're going to DAC this week or not, it's worth remembering one of the other key factors that will inform your judgments on new tools.

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