debug

June 8, 2015

Formal integration enhances bug-hunting for Cadence

Following the acquisition of Jasper Design Automation last year, Cadence Design Systems is widening the target base of applications for formal verification, covering tasks from bug hunting through accelerated simulation to 'superlinting'.
June 3, 2015

ARM eases interconnect, debug, third-party IP integration for SoCs

Technology from Duolog acquisition used to ease the configuration of interconnect, debug and trace - and the integration of third-party IP
Article  |  Topics: Blog Topics  |  Tags: , , ,   |  Organizations: ,
May 21, 2015

Real Intent tackles CDC at the physical level

Meridian Physical CDC targets post-synthesis gate-level clock domain crossing issues, including unintended glitches and functional failures.
April 28, 2015

Cadence upgrades debug for system-level era

Cadence Design Systems has launched a debug tool designed to improve the speed of bug hunting in SystemVerilog but which the company expects to grow into analog and post-silicon work.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , ,   |  Organizations:
April 22, 2015

UltraSoC pushes debug over USB

UltraSoC has added the ability to employ a USB 2.0 port instead of JTAG as the main debug access point on SoCs that use the company’s UltraDebug technology.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , ,   |  Organizations:
February 9, 2015

Mentor extends industrial embedded offering

New portfolio integrates and extends existing industrial embedded tools to meet the demands of Industry 4.0
October 2, 2014

ARM to extend Big.Little for GPUs and heat management

A multiprocessor test chip has led ARM to improve the energy-control strategy for its Big.Little architecture and to simplify the debug architecture for the company's multicore processor IP.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , , ,   |  Organizations:
September 30, 2014

Real Intent’s Meridian CDC flexes hierarchical muscle, adds flexible debug

Major overhaul of clock domain crossing suite adds configurable debugger, boosts performance by 30% and cuts memory 40% for 'giga-scale' designs.
Article  |  Topics: Verification  |  Tags: , ,   |  Organizations:
September 29, 2014

Verification platform offers unified compile, debug environments

Synopsys is integrating its verification tools to make it easier to move between verification approaches for software centric SoCs
Article  |  Topics: Blog Topics, Verification  |  Tags: , , , , , , ,   |  Organizations:
June 9, 2014

Applications won’t find all the bugs, but they have their uses

Can applications provide useful input for verification? They can but not when run straight out of the box, panelists at DAC 2014 said.

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