Author Archives: TDF Staff

Synopsys and Analog Devices have agreed to provide model libraries for the chipmaker's DC/DC ICs and power regulators that work with the Saber simulation tool.

Real Intent has extended the fault coverage of its Meridian DFT static sign-off tool with improvements to the reporting of issues and the ability to track down root causes.

DVCon Europe will be held as a live event in Munich in early December.

Silicon Photonics 3D integration posed LVS challenges in this fast emerging technical space. A case study describes how the two institutions overcame them.

A Siemens white paper describes a way of automatically deriving information from 2.5D/3DIC designs to streamline latchup design-rules verification.

Siemens Digital Industries Software has launched the latest generation of its Veloce hardware-assisted verification systems with a product line that encompasses silicon virtual platform, hardware emulation, and prototyping support.

At the recent Embedded World show and conference, Colin Walls of Siemens tackled the choices facing software developers working with multicore SoCs.

Breker has added a number of specialized apps to its library that deal with the verification of RISC-V processors, secure enclaves, and machine-learning designs.

Mentor, a Siemens Business, will offer a broad range of technical and market insights at the event – as well as a free virtual coffee for those who visit its virtual booth at the show.

A white paper details the parasitic extraction technology needed to help design high-performance RF SoCs.