Author Archives: TDF Staff

Agile Analog has launched its own digital standard cell library, designed to be used in the control circuits for analog blocks that form the IP company’s main offering.

X-Fab is using IHP technology to add a 130nm silicon germanium process to its offering.

The ESD Alliance is hosting a panel and networking event at next week's colocated Design Automation Conference and SEMICON West.

Breker's presence at next week's Design Automation Conference (DAC) will emphasize a new collaboration around the RISC-V platform.

Axiomise founder and formal expert Ashish Darbari will present across multiple events at DAC in San Francisco next week.

The tool development specialist will demonstrate its broad portfolio at next week's Design Automation Conference in San Francisco.

Primarius Technologies is making additions to its portfolio of library-design and verification tools at DAC next week.

CXL is a strongly-backed technology aimed at improving connectivity across datacenters handling high demand HPC and AI applications.

TSMC has certified the Aprisa place-and-route software from Siemens Digital Industries Software for the N5 and N4 process technologies.

Siemens has expanded its Nucleus ReadyStart program to the RISC-V architecture.