Author Archives: Chris Edwards

About Chris Edwards

Chris Edwards has spent a long time covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology. His work has appeared in a variety of international newspapers including The Guardian, The Daily Telegraph, The Age and the South China Morning Post.
June 4, 2012

DAC 2012: Google your way to DFM

The Silicon Integration Initiative (Si2) is targeting the end of the year for release 2.0 of its OpenDFM standard, which will include support for DRC+ and make it possible to build search engines for yield.
Article  |  Topics: Design to Silicon, Standards  |  Tags: , , , ,   |  Organizations: ,
June 4, 2012

ESL: are we there yet?

Verification drives system-level adoption as sales leap 76%. Virtual prototyping is also on the rise but there are gaps in the tool-set.
June 4, 2012

DAC 2012: The platforms are taking over

At last year’s DAC, leading EDA analyst Gary Smith said chip design had run into a big problem: it was already too expensive to be worthwhile for most companies. Soon afterwards, three companies rang to tell him that the figures were too pessimistic: it was not costing in the region of $75m but perhaps just […]

May 29, 2012

DAC 2012: Calypto brings tools together for high-level power savings

Calypto has combined the Catapult high-level synthesis (HLS) tool with elements of its PowerPro software to focus on the demand for lower-power SoC designs.
May 23, 2012

TI tool hands out low-power tips

Texas Instruments has put together a tool aimed at users of its MSP430 microcontroller family that will help cut the power consumption of their applications.
Article  |  Topics: Commentary, Blog - Embedded  |  Tags: , , , , ,   |  Organizations:
May 15, 2012

Analog designers ‘need to use digital tools’

Designers working on mixed-signal circuits will benefit from using digital tools, Cadence's SVP of R&D for custom design said at CDNLive EMEA today. But for those who don't a faster fast Spice is on its way.
May 14, 2012

Intel’s tapered fin reveals short-channel issues

A startup has analyzed the shape of Intel's fins and found the process is not quite as well-behaved as circuit designers would perhaps like.
Article  |  Topics: Commentary, Design to Silicon  |  Tags: , ,   |  Organizations: ,
April 25, 2012

Mentor unveils second-generation Veloce emulator

Mentor Graphics has updated its Veloce emulator, using a newly developed chip to double capacity while, at the same time, developing new software to overcome the traditional handicaps of in-circuit emulation.
Article  |  Topics: Commentary, Design to Silicon  |  Tags: , , ,   |  Organizations:
April 24, 2012

Xilinx revamps design software for new processes

Xilinx has created Vivado, a new set of tools to support sub-30nm FPGAs that, for advanced designs at least, will take over from its long-established ISE suite.
Article  |  Topics: Commentary, Design to Silicon  |  Tags: , , , , , ,   |  Organizations:
April 17, 2012

SpringSoft tackles analog automation with new twist on constraints

SpringSoft is trying a different approach to constraint-based design in a bid to improve the automation of custom and mixed-signal design, particularly on advanced process nodes.