About Chris Edwards
Chris Edwards has spent a long time covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology. His work has appeared in a variety of international newspapers including The Guardian, The Daily Telegraph, The Age and the South China Morning Post.
June 12, 2012
During his CEDA talk at DAC last week Professor Mark Horowitz challenged the audience to find holes in the approach he and his team have been developing over the past few years to rethink analog design.
June 11, 2012
FinFET or trigate structure provide a number of degrees of freedom in design in the battle against DIBL – and one of those dimensions is doping, Professor Tsu-Jae King Liu explained in a course ahead of the 2012 VLSI Symposia this week.
June 11, 2012
A deal between GlobalFoundries and STMicroelectronics has answered the question as to where ICs based on an FD-SOI process can be made, and not just for ST.
June 6, 2012
Accellera has approved version 1.0 of the Unified Coverage Interoperability Standard (UCIS). Here's how it works.
June 6, 2012
Intel's Ivy Bridge series of processors were designed from the outset to be split apart and recombined to create variants of the base platform, Intel architecture project manager Brad Heaney explained during the Wednesday keynote session at DAC 2012.
June 5, 2012
Could subthreshold circuitry help extend the reach of power gating? Mike Muller said during his DAC keynote that the technique looks viable.
June 5, 2012
Do you know where the IP for your design has been? Or where it's going? That's the question a lot of CAD groups face as they struggle with regulatory, bug-fixing and yield issues.
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June 4, 2012
The Silicon Integration Initiative (Si2) is targeting the end of the year for release 2.0 of its OpenDFM standard, which will include support for DRC+ and make it possible to build search engines for yield.
June 4, 2012
Verification drives system-level adoption as sales leap 76%. Virtual prototyping is also on the rise but there are gaps in the tool-set.
June 4, 2012
At last year’s DAC, leading EDA analyst Gary Smith said chip design had run into a big problem: it was already too expensive to be worthwhile for most companies. Soon afterwards, three companies rang to tell him that the figures were too pessimistic: it was not costing in the region of $75m but perhaps just […]