ESL: are we there yet?
For years the complaint from EDA companies as to why the development of electronic system-level tools has been so low key is that the customers aren’t ready to pay for them. According to the latest numbers from Gary Smith EDA, the times they are a-changin’.
In the second half of his Sunday evening presentation at DAC 2012, Gary Smith said as he put up a chart that showed a sudden jump in sales of ESL tools from 2010 to 2011: “We are finally seeing ESL take off. The trouble is, however, that most of was driven by verification,” he said.
According to the Gary Smith EDA figures, ESL tools sales climbed steadily from $23m in 1992 to $262m in 2010. In 2011, the number jumped to $460m. Although verification-focused tools accounted for much of the growth, it’s not entirely at the expense of other categories, Smith said: “The architectural workbench is now a pretty good number. High-level synthesis is growing well. And one of the bigger categories is what I now call manycore software-development tools.”
Another class of tool that is finally getting traction among mainstream design teams is that of the silicon virtual prototype, although there are still gaps in the tools for this.
“I started talking about the silicon virtual prototype in 1996. From 1997 to 2003, power users started developing them in-house. STMicroelectronics probably had the most powerful example,” Smith observed. “But the big four weren’t very interested in getting people to move away from their RTL flows. Then in 2010, the upper mainstream started moving into ESL. Power users already had it with a lot of internal tools. I got a lot of frank phone calls from these mainstream guys. Their question was: where is the flow?
“Another question was: how come there is no synthesizable SystemC subset? I had to give them the bad news.”
Although there are several ways to put together a virtual prototype for software development, the reality was, Smith said, that a lot of the links between the system and RTL level that would make it possible to build a functional silicon virtual prototype lay not in dedicated tools but an Excel spreadsheet.
“There was nothing linking the architect’s workbench down to the virtual prototype. There were some platforms that could do pinouts and integrated IP. But a lot of the rest was in an Excel spreadsheet,” Smith claimed.
Smith said the aim is to get two types of silicon virtual prototype that can supplant Excel and a lot of manual tweaking. The first layer, SVP1, is aimed at the early phase, pulling together transaction-level models and the development of inhouse platforms. The second, SVP2, pulls in the existing RTL and blocks synthesized from SystemC. Its output should be the ‘golden netlist’.
The software developers, in contrast, are getting spoilt for choice with four different types of software virtual platform. The first is one that has evolved gradually since the mid-1990s: the architect’s workbench, which is either a collection of C or C++ models or a simulation put together in a tool such as Matlab.
The second is where the application code is written with the third, with more low-level detail, being used for firmware development. “This is where you get the codesign going on,” said Smith.
Finally, the fourth is the one used for marketing: to show to customers how the final design is intended to work.
“You have four different prototypes serving four different functions. And there are four different price points,” Smith said, ranging from the architect’s workbench at the high end down to the marketing environment. “The sales guys are thinking of paying around $2000, which is unrealistic but that’s what they are thinking.
“The good news,” Smith added. “Is that these teams are under the control of the hardware guys who want to spend money to solve problems. The bad news is that they are moving money out of the EDA budget into the software budget. It’s been a zero-sum switch, but that’s got to change.”
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