DATE notebook: Help for heat-sensitive chips
Until the software is ready, it's often hard to tell when two neighbouring units on an SoC could combine to push the package past its maximum thermal point. Docea Power aims to help.
Author Archives: Chris Edwards
DATE notebook: Constraints smooth path for FPGA synthesis
Blue Pearl Software has extended its reach into the world of field-programmable gate array (FPGA) design and verification with a project that has culminated in a tighter integration between its timing analysis tools and the Synopsys Synplify Pro tool.
DATE notebook: Electric motion
Robert Bosch is expecting to see major growth in electronics in cars over the coming decade. But most of that growth will not be coming from electric vehicles of the four-wheeled variety, said the company's automotive division president.
DATE notebook: EDA for the rest of us
Old processes don't necessarily equate to old tools, panelists argued at DATE, especially when a lot of future work will be done on more-than-Moore, 3DIC technologies.
DATE notebook: Forget automation, give us acceleration
The CTO of one European design house wants better acceleration features from analog design tools, not automation that overrides their judgement.
DATE notebook: Stack those servers high
Concern over energy consumption could be the key to European companies moving back into the compute server market – or at least that's what the European Commission and researchers think is possible as social networks, GPS data and public video cameras pour data into a growing collection of online storage banks.
ARM decodes a surprising power benefit
ARM has found that in its work on processor design looking at the system-design and process issues as well as the way software interacts with the machine can yield surprising results.
Technical Newsletter #2: 14nm and Beyond, Low Power, Double Patterning, CPTF
In this issue Chris Edwards introduces our interviews with key speakers at next week’s Common Platform Technology Forum, and highlights our presence at Cadence’s CDN Live and Europe’s DATE conferences. Dr Mukesh Khare of IBM Research discusses the ‘Innovation Pipeline’ beyond 14nm. Kelvin Low of GlobalFoundries describes how fabless companies can exploit 28nm processes. Michael […]
Highlights of DATE 2012
The Design Automation and Test in Europe (DATE) is approaching fast. This year the conference has two special days: one focuses on more than Moore technologies; the other on e-mobility and electric transport.
IMEC readies finFETs for 14nm PDK
FinFETs are among the options in a 14nm process design kit developed by IMEC: a kit that attempts to cater for the effects of immersion and EUV lithography.