Blog Topics

IBM to offer end-to-end IC design flow on its own infrastructure in PAYG EDA model.

Invionics will be using its software environment to create a custom tool within just two days at the 52nd DAC.

OneSpin Solutions has used its formal-verification technology as the basis for an app intended for ISO 26262 projects that analyzes the ability of a design to deal with fault conditions.

Docea Power has added a programming interface to the latest version of its Aceplorer power-modeling software to show how chipset designs would fare under a variety of software-based power-management algorithms.

CAST and SoC Solutions have teamed up to put together pre-integrated platforms, with designs that reach down into the 8bit space.

Online conference discusses software testing for avionics and security, code coverage, agile methodologies, behaviour-driven development and more

Embedded SRAM IP said to reduce dynamic, static power on FDSOI at cost of extra 10% area

Real Intent has lined up a mixture of technology and speed tests for its presence on Booth #1422 at the Design Automation Conference this year.

Synopsys will be emphasising its 'silicon to software' offering at the 2015 Design Automation Conference.

An overview of Cadence's activities at DAC and a last-minute call-out if you want to register for its breakfast and luncheon sessions.