lithography

June 18, 2015

The road to 7nm sees patterning multiply

Is the industry ready to go beyond 10nm when it comes to lithography? Lithography researcher Professor David Pan sees design and process co-operation as the key approach.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: , ,
November 4, 2014

From Darwin to Mao: how multi-patterning could move up the flow

Are we torn between evolution and revolution? Mentor Graphics' Joe Sawicki discusses how pattern matching already in fabs could move up and radically alter the design flow.
December 11, 2012

Semiconductor roadmap gets fuzzier at IEDM

Semiconductor process options outlined at IEDM by Luc van den Hove of imec as industry faces hard choices and rising costs
September 6, 2012

Getting ready for 20nm

Tackling the three key challenges of 20nm processes: design complexity; the physics of lithography; and economics.
August 6, 2012

TSMC joins Intel as ASML investor to accelerate availability of EUV, 450mm lithography

TSMC follows Intel in taking a stake in ASML to accelerate development of EUV and 450mm lithography equipment.
Article  |  Topics: Commentary, Design to Silicon  |  Tags: , ,   |  Organizations: , ,
March 15, 2012

CPTF notebook: From restricted to ‘proscriptive’ design rules

Ever increasing lithography challenges mean the next generation of design rules may concentrate on telling you just what you can rather than what you cannot do.

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