IEDM looks to spin glasses and brain-like platforms
IEDM plans to expand its range of coverage for the 2019 event to encompass a range of novel computing platforms, from neuromorphic architectures to machines that emulate thermodynamic systems.
Author Archives: Chris Edwards
Fast process access gets Moortec onto 7nm
Early access to tools for new processes is helping Moortec deliver IP to determine the real-time health of on-chip circuits.
HPC futures report puts acceleration first
A report put together by Europe's HiPEAC high-performance computing research network argues computing is at an architectural turning point
Ceva extends control-oriented DSP
Ceva has followed its IoT-oriented Ceva-X series of processor cores with a more powerful family that is designed to handle control and signal-processing algorithms using the same pipeline.
IEDM shows progress on embedded eMRAM
Embedded magnetic RAM is emerging as a contender for on-chip memory not just from a density standpoint but from that of power.
Microchip opts for RISC-V cores in SoC FPGA
Microsemi has put multiple RISC-V cores into a new generation of SoC FPGAs, intended for embedded systems that need to run Linux.
Leti takes the heat off monolithic 3D
CEA-Leti claimed at IEDM to have achieved major steps in bringing monolithic 3D integration closer to production readiness.
Achronix builds machine learning IP into eFPGA
Achronix has incorporated direct support for machine learning into the latest version of its eFPGA architecture.
Accellera updates UVM reference implementation
Accellera has updated the reference implementation for the Universal Verification Methodology to reflect the changes made for the latest release of the standard.
Netronome launches chiplet initiative for network-accelerator SIPs
Data-center networking specialist Netronome has recruited a number of silicon makers and IP suppliers to a standard for chiplet designs that can be used in SIPs for edge computers and servers.