EDA

The trend toward Level 5 fully autonomous vehicles poses major complexity, cost and change issues that Generative Design flows aim to address.

5G has given Beijing a development template to use across its Made in China 2025 program.

MACOM has decided to use GlobalFoundries' 90nm SOI process on 300mm wafers to build higher-integration optical-switching devices for servers.

Do China's ambitions as a world-class innovator face fundamental challenges as a result of the sector's existing economic infrastructure?

OneSpin will focus at DVCon on its formal integrity verification platform for the RISC-V open-source which aims to speed up the core's adoption. The company will also feature the solution with a partner at EmbeddedWorld.

Metrics Technologies demonstrate its cloud-based platform for ASIC and complex FPGA verification and discuss a new partnership with Concept Engineering.

Verific Design Automation , specialist in parsers for SystemVerilog, VHDL and UPF, will also demo its INVIO platform with high level Python and C++ APIs.

The electronic systems design community's main trade organization will be at DVCon with the latest updates on the process of becoming a SEMI strategic association partner.

The company will demonstrate the latest capabilities in its Trek5 portfolio, building on Accellera's Portable Stimulus Standard.

Testbench connections often depend on the virtual interface feature of SystemVerilog but other options - like abstract classes - can help.