Conference

December 3, 2021

DAC 2021 preview: Verific

Tool development enabler Verific will demonstrate its parsers, including a combination with the INVIO API platform at DAC 2021 in San Francisco next week.
Article  |  Topics: Conferences, Tool development, Verification  |  Tags: , , , , , , ,   |  Organizations: ,
December 3, 2021

Axiomise expands formal training services from beginner to expert

The formal specialist is offering courses across six tiers, including case studies and lab work, with immediate availability.
Article  |  Topics: Blog - EDA, - Training, Verification  |  Tags:   |  Organizations: ,
December 3, 2021

DAC 2021 preview: SmartDV

The design and verification IP specialist will present its full range, including the Smart Compiler, at next week's Design Automation Conference.
Article  |  Topics: Conferences, Digital/analog implementation, Blog - EDA, - RTL, Verification  |  Tags:   |  Organizations: ,
October 11, 2021

ITC 2021 preview: Siemens Digital Industries Software

Packetized test and three new technologies provide the core of the company's DFT presentations during the virtual International Test Conference running this week.
Article  |  Topics: EDA - DFT, Blog - EDA  |  Tags: , , ,   |  Organizations: ,
August 5, 2021

Keynotes for DVCon Europe announced

DVCon Europe has announced its first two keynote speakers, who will cover the topics of AI and the role of virtualisation in ADAS design and implementation
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations: ,
February 26, 2021

Embeddedworld 2021 Digital preview: Siemens Embedded

Following its rebranding from Mentor, the division will have a strong presence in the main program and across virtual roundtables at next week's online event.
Article  |  Topics: Conferences, Blog - Embedded  |  Tags:   |  Organizations: ,
January 14, 2021

A new methodology addresses the increasing challenge of reset domain crossing

Originally presented at DVCon Europe, a new paper automates complex steps in RDC verification and reduces noise.
Article  |  Topics: Case Study, Verification  |  Tags: ,   |  Organizations: ,
November 3, 2020

Tessent Streaming Scan Network to shrink SoC test writing and runtimes

Mentor's latest additions to Tessent aim to cut test time by a factor of four but remains tailored for increasing design complexity.
Article  |  Topics: Blog Topics  |  Tags: , , , , ,   |  Organizations: , ,
October 29, 2020

User2User sets virtual 2020 dates: US in November, Europe in December

The free-to-attend user meetings for Mentor clients will retain the same format mixing technical presentations with keynotes and networking.
July 30, 2020

Second formal check aids deadlock hunting

Arm works with EDA to find new efficiencies based on extra CTL-based check in Questa runs.
Article  |  Topics: Verification  |  Tags: , , , ,   |  Organizations: , ,

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