Archives

Arm has put together a program based on its existing Flexible Access model that is intended to provide early-state startups with a broader list of cores they can prototype before needing to take out a full licence.

High-level synthesis is playing another important role in the matching of AI algorithms to necessarily application-specific designs.

Automated resistance checks mitigate the increasing complexity involved when analyzing voltage drop, ESD and noise, particularly for analog-heavy designs.

UltraSoC and Agile Analog have teamed up to build an infrastructure that can help guard against physical attacks on SoCs.

The PCB and wire harness design specialist has posted an online blog with tips and advice on using and licensing its tools for home use.

The verification specialist is adding more online resources to help engineers working from home during the Covid-19 pandemic.

Updates to existing designs are often error-prone, though safety tolerances are necessarily tightening. This four-step strategy can help.

Wire harness implementations already face tough margins and increasing design pressure from markets such as automotive. Here's how tools can help.

Traditional approaches to via insertion to meet reliability and yield at advanced nodes are giving way to necessary automation.

Intel describes active countermeasures for physical attacks at CICC as part of a trend towards more adaptive IoT silicon.