Archives

There's still time - just - to reserve your place at EDAC's Back To the Future dinner and auction to raise funds to mark EDA's contribution to our business at the Computer History Museum.

Cadence Design Systems has developed a version of its Spectre FastSpice tool that splits simulation across many computers without manually cutting the design into segments.

Silicon Labs is aiming at Internet of Things applications with an ARM Cortex M0+-based MCU family with encryption engine and low-energy DAC for biasing analog circuitry.

The EDA vendor has set a broad agenda across two Silicon Valley events taking place in late October, with registration now open for both.

Real-value modelling and flows using the Open Access database will be among the focus topics of Cadence's Mixed-Signal Technology Summit on 10 October.

Design services company eSilicon has made freely available a tool it developed to streamline ordering for multi-project wafer (MPW) ‘shuttle’ services.

Research group CEA-Leti expects to have design kits ready for a 10nm FD-SOI process in June 2014

Accellera has vendor extensions for IP-XACT that allow tool-specific metadata to be added to support activities such as power-aware verification and floorplanning.

For the new web TV program Unhinged, Brian Fuller talked to venture capitalist Jim Hogan about the future of mixed-signal and the past of EDA.

TSMC 16nm finFET process and efforts to increase p-finFET mobility using germanium to be detailed at December's International Electron Devices Meeting.