Archives

DAC to link chip, software and system design to automotive OEMs with a new track covering 21 topics within four themes. Call for abstracts now open.

Mentor's new version of its RTOS targets once high-cost flexibility with secure and reliable in-operation upgrades and app swap-outs for medical, industrial and smart energy.

ARM has launched the -R version of its v8 architecture, targeting applications in automotive and industrial systems and possibly spawning a new generation of Linux-oriented microcontollers.

Packed one-day event has speakers from Cadence, TSMC, Samsung, Amkor, Advantest and more providing a senior level view of making 3D-IC a reality. Registration closes soon.

Memoir Systems has developed a set of memory controller IP cores that exploit common access patterns used by processors in network switches to improve performance and power consumption

Formal techniques now underpin static verification approaches to checking clock domain crossings, constraints, reset and initialization states, and more

Cadence Design Systems has issued a call for papers for the European leg of its CDNLive of events for 2014. The deadline for the Silicon Valley event is also looming: the call closes mid-November 2013.

The Indian government will meet up to a quarter of initial capital costs for a foundry capable of nodes up to 45nm and 40,000 wafer starts per month at 300mm.

The one-day conference series features the latest innovations from many verification vendors in separate UK, France and Germany editions.

Cadence Design Systems has launched IP cores for high-end mobile audio as well as gigasample ADCs for 28nm to support 60GHz wireless.