Archives

March 20, 2019

Microsoft offers free RTL for fast server compression

Not only has Microsoft decided to make a compression algorithm intended for data centers open source, the company the company is providing its own RTL to anyone who wants to implement it in silicon.
Article  |  Topics: Blog - IP  |  Tags: , , , , ,   |  Organizations: ,
March 18, 2019

PCI may provide key to OCP chiplet standard

The ODSA Workgroup formed by Netronome and others is looking to adopt the PIPE standard for interconnecting chiplets as it starts work on a proof-of-concept module.
March 15, 2019

ES Design West registration opens

Registration has opened for the first ES Design West exhibition, which takes place alongside Semicon West in San Francisco in July.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: ,
March 12, 2019

Free registration opens for DAC

The Design Automation Conference (DAC) has kicked off free registration for the exhibit floor at early June's Las Vegas event.
March 12, 2019

Mastering automotive complexity through generative design

The trend toward Level 5 fully autonomous vehicles poses major complexity, cost and change issues that Generative Design flows aim to address.
March 6, 2019

MACOM to use GlobalFoundries 300mm SOI for PICs

MACOM has decided to use GlobalFoundries' 90nm SOI process on 300mm wafers to build higher-integration optical-switching devices for servers.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , ,   |  Organizations:
February 28, 2019

Graphcore licenses ESD protection from Sofics

Graphcore has licensed IP from Belgium-based Sofics to protect its Colossus GC2 processors from ESD.
Article  |  Topics: Blog - IP  |  Tags: , , ,
February 26, 2019

A hardware-centric approach to checking HLS code before synthesis

Tools that checks pre-synthesis C++ and SystemC code have historically had no understanding of hardware intent. The Catapult Design Checker fills that gap.
Article  |  Topics: Blog Topics, HLS, RTL, Verification  |  Tags: , , , , ,   |  Organizations:
February 22, 2019

DVCon USA 2019 preview: OneSpin

OneSpin will focus at DVCon on its formal integrity verification platform for the RISC-V open-source which aims to speed up the core's adoption. The company will also feature the solution with a partner at EmbeddedWorld.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , ,   |  Organizations: ,
February 21, 2019

EmbeddedWorld 2019 preview: Mentor

The company will share a stand at EmbeddedWorld in Nuremberg with its sister Siemens division Polarion and has seven papers across the technical program.